The present invention relates to a semiconductor device and a method for manufacturing the same, and can be suitably utilized, for example, in a semiconductor device including a semiconductor element formed in a semiconductor substrate and in a method for manufacturing the same.
There is widely used a semiconductor device which includes: a memory cell region where a memory cell such as, for example, a nonvolatile memory, is formed over a semiconductor substrate; and a peripheral circuit region where a peripheral circuit constituted by such as, for example, a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is formed over the semiconductor substrate. That is, a semiconductor device is widely used, in which a memory cell such as, for example, a nonvolatile memory, and a MISFET forming a peripheral circuit are mounted in the respective regions over a semiconductor substrate (i.e., are mixedly mounted over a semiconductor substrate).
For example, as a nonvolatile memory, a memory cell constituted by a split-gate cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film may be formed. At this time, the memory cell is formed by two MISFETs, i.e., a control transistor with a control gate electrode and a memory transistor with a memory gate electrode. In a case where such a memory cell such as a nonvolatile memory and a MISFET forming a peripheral circuit are mixedly mounted over a semiconductor substrate, a gate electrode is formed in the respective regions.
Japanese Patent Laid-Open No. 2003-17596 (Patent Document 1) discloses a technique in which, after forming a lamination-type gate electrode of a nonvolatile memory in a first region and before forming a gate electrode of a MISFET in a second region, an insulating film is formed so that a silicon film serving as the gate electrode of the MISFET is covered.
Japanese Patent Laid-Open No. 2007-258743 (Patent Document 2) discloses a technique in which a gate electrode is formed by patterning a laminated film including a titanium silicide film, then a silicon film is formed on a sidewall of the titanium silicide film, and subsequently in oxidizing the surface of a semiconductor substrate, oxidation of the titanium silicide film is prevented.
Japanese Patent Laid-Open No. 11-40515 (Patent Document 3) discloses a technique, in which a gate electrode is formed by patterning a laminated film including a titanium silicide film, then a titanium nitride film is formed on a side surface of the titanium silicide film, and subsequently, a silicon oxide film is formed and thus silicon oxide film spacer is formed.
Japanese Patent Laid-Open No. 2002-141500 (Patent Document 4) discloses a technique, in which a gate electrode is formed by patterning a laminated film including a tungsten film and then a damascene gate cap formed of a silicon nitride film is formed on a side surface of the gate electrode.